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Nov 23, 2024
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EE 4683 - Computer Architecture
Emphasis on the design of advanced architectural concepts for multicores; performance trade-offs for multicores, advanced pipelining, superscalar and dynamic scheduling, limits of instruction level parallelism, multithreading and multicores, multi-level caching, virtual memory, I/O fundamentals and techniques, classification of parallel machines, shared memory multiprocessors, cache coherence, interconnection networks and clusters. Term paper/project involving computer hardware design and system simulation required.
Requisites: EE 3613
Credit Hours: 3
Repeat/Retake Information: May be retaken two times excluding withdrawals, but only last course taken counts.
Lecture/Lab Hours: 3.0 lecture
Grades: Eligible Grades: A-F,WP,WF,WN,FN,AU,I
Learning Outcomes: - Ability to apply parallel processing approaches to design scalar and superscalar processors.
- Ability to describe data access from magnetic and optical disk drives.
- Ability to explain how to use interrupts to implement I/O control and data transfers.
- Ability to explain the different parallel processing paradigms and their usefulness and applicability.
- Ability to identify various types of buses in a computer system.
- Ability to understand advance topics in memory management including multi-level caching and virtual memory organizations.
- Ability to understand advanced concepts of instruction level parallelism: out-of-order execution, loop unrolling and dynamic scheduling.
- Ability to understand how cache coherence is implemented in shared memory multiprocessors that allow sharing of data.
- Ability to understand limitations of instruction level parallelism and further advances into multithreading and multicore architectures.
- Ability to understand the factors that contribute to computer performance, understand its limitations and select the most appropriate performance metrics while evaluating a computer.
- Ability to understand various performance factors of interconnection networks in terms of topology, bisection bandwidth and link bandwidth.
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